Electronic equipment that is used in outer space (and in other radiation environments) contains integrated circuits that are exposed to radiation. Radiation is capable of damaging the structure and operation of integrated circuits. In particular, it is known that many bipolar linear integrated circuits exhibit enhanced low-dose-rate sensitivity (ELDRS) at low electric fields. In addition, many bipolar linear integrated circuits also exhibit pre-radiation elevated temperature stress (PETS) sensitivity. In the design and manufacture of integrated circuits it is desirable to eliminate (or at least minimize) the ELDRS and PETS effects in bipolar linear integrated circuits.
It is known that the passivation layers in an integrated circuit chip have a major impact on the total radiation dose hardness of bipolar linear integrated circuits. See, for example, a paper entitled “Impact of Passivation Layers on Enhanced Low-Dose-Rate Sensitivity and Pre-Irradiation Elevated-Temperature Stress Effects in Bipolar Linear ICs” by M. R. Shaneyfelt et al., published in IEEE Transactions on Nuclear Science, Volume 49, Number 6, pp. 3171-3179, December 2002. This paper established that for one technology devices that were fabricated without passivation layers do not exhibit ELDRS or PETS sensitivity, while devices from the same production lot fabricated with either oxide or nitride or doped-glass passivation layers were ELDRS and PETS sensitive.
Therefore efforts have been made to identify the effect of various types of passivation layers on ELDRS effects in bipolar linear integrated circuits. See, for example, a paper entitled “Passivation Layers for Reduced Total Dose Effects and ELDRS in Linear Bipolar Devices” by M. R. Shaneyfelt et al., published in IEEE Transactions on Nuclear Science, Volume 50, Number 6, pp. 1784-1790, December 2003. Some passivation layers exist that are capable of significantly reducing or eliminating ELDRS effects for total doses up to one hundred kilorads (100 krad (SiO2)). The mechanisms associated with ELDRS and how they correlate to the passivation layers of integrated circuits are not completely understood.
Bipolar linear integrated circuits and discrete bipolar linear products possess some degradation from the ELDRS effect. In the past only high dose rate (HDR) was performed for radiation hardness qualified products and the low dose rate (LDR) was not performed. It was generally assumed that the high dose rate (HDR) was the “worst case” condition.
After 1991 it was recognized that the ELDRS effect was a legitimate and viable failure mechanism for bipolar linear integrated circuit products that were being utilized in space. Space dose rates are much lower than the dose rates of ground radiation simulators that are presently being used for testing. Because of the ELDRS effect, many of space electronic systems are at risk of not meeting their usable life expectancy. The ELDRS effect has therefore created a systems reliability problem that is due to radiation induced parametric degradation.
Prior art attempts to solve this problem in addressing Total Ionizing Dose (TID) have been made. The prior art approaches have included the use of shielding, derating and other radiation hardening techniques. However, these prior art approaches have increased the component count of the integrated circuit, have increased the area of the integrated circuit, have increased the weight of the integrated circuit, and have increased the cost of the integrated circuit.
Therefore there is a need in the art for a system and method for finding more efficient and cost effective methods to protect integrated circuits from radiation effects. There is a need in the art for a system and method for providing integrated circuits that have increased radiation hardness and reliability. There is a need in the art for a system and method for providing integrated circuits that have minimal sensitivity to ELDRS and PETS effects.